1. Field of Invention
The present invention relates to a method of manufacturing integrated circuits. More particularly, the present invention relates to a method of manufacturing thermally stable tungsten silicide in the gate structure of a metal-oxide-semiconductor (MOS) device.
2. Description of Related Art
Because refractory metal silicide has the special properties of a high melting point, thermal stability and low resistivity, it is now extensively used in the fabrication of VLSI devices in semiconductor industry. Refractory metal silicide is usually formed between a silicon layer and an aluminum layer to improve their ohmic contact. The refractory metal silicide is also formed as part of the metallic layer in a MOS gate. The most commonly used refractory metal silicide includes tungsten silicide (WSi.sub.x).
When a doped polysilicon layer is deposited over a tungsten silicide layer, a polysilicon/tungsten silicide layer or a polycide layer for shorts is formed. Polycide layers are now routinely used in commercial VLSI production processes involving the formation of gate conductive layers. Tungsten silicide is normally deposited over other materials using a low-pressure chemical vapor deposition (LPCVD) or a sputtering method. After the polysilicon layer and the tungsten silicide layer are properly deposited, photolithographic and etching techniques are used to pattern the polycide layer forming the gate structure of a MOS. Since the line width of a conductive layer must be controlled precisely, the polycide layer must also be etched using an anisotropic dry etching operation.
In general, in addition to the polysilicon layer and the tungsten silicide layer, a silicon nitride layer (Si.sub.3 N.sub.4) is also deposited over the tungsten silicide layer. This silicon nitride layer is used as a cap protecting the gate terminal. Normally, the silicon nitride layer is formed using a low-pressure chemical vapor deposition (LPCVD) process. However, the process of depositing silicon nitride over the tungsten silicide layer generally requires a very high temperature. Consequently, the tungsten silicide layer will also re-crystallize forming voids and then, silicon nitride crevices at the grain boundaries.
FIGS. 1A through 1D are cross-sectional views showing the progression of manufacturing steps in producing a gate structure according to a conventional method. First, as shown in FIG. 1A, a semiconductor substrate 100 is provided. Then, a polysilicon layer 102 and a tungsten silicide layer 104 are sequentially formed over the substrate 100. For example, the polysilicon layer 102 can be formed by using a low-pressure chemical vapor deposition process, and the tungsten silicide layer 104 can be formed by using a physical vapor deposition (PVD) process.
Next, as shown in FIG. 1B, a silicon nitride layer 106 is formed over the tungsten slicide layer 104 using, for example, a low pressure chemical vapor deposition (LPCVD) process. While silicon nitride is being deposited over the tungsten silicide layer 104, the tungsten silicide layer 104 re-crystallizes, forming a grainy tungsten silicide layer 104' having a number of voids and crevices at the grain boundaries 108. Consequently, the silicon nitride above the tungsten silicide layer will gradually move down to fill these voids and crevices at the grain boundaries 108 as shown in FIG. 1B.
Thereafter, as shown in FIG. 1C, photolithographic and etching operations are carried out to remove a portion of the silicon nitride layer 106, the tungsten silicide layer 104' and the polysilicon layer 102 to form a gate structure 110.
Ideally, portions of the silicon nitride layer 106, the tungsten silicide layer 104' and the polysilicon layer 102 lying outside the gate region should be completely removed when those layers are etched as shown in FIG. 1C. However, due to the presence of silicon nitride material in the voids and crevices at the grain boundaries 108 of the tungsten silicide layer 104', the etching operation is unable to remove all the silicon nitride material deep down inside the boundaries when the silicon nitride layer 106 is patterned.
Consequently, a residual silicon nitride layer 106' will remain as shown in FIG. 1D. This silicon nitride layer 106' act like a hard mask preventing the subsequent etching of the tungsten silicide layer 104' and the polysilicon layer 102. Therefore, bit lines may be short-circuited and erroneous signals may be generated while the device is in operation.
In light of the foregoing, there is a need to improve the thermal stability of a tungsten silicide layer.